PCI Express 4 Port Switch

Specifications

  • PCI Express Spec. 1.1 Compliant
  • Low Silicon Footprint
  • Low Latency
  • Built upon ASIC Architect's PCI Express Switch Port Cores
  • 1-Upstream Switch Port to Interface with the Root Port
  • Upto 3-Downstream Switch Ports to Interface with Endpoints or Switch Ports
  • Peer-to-Peer Communication Support
  • Complete Power Management Support
  • Support upto 2 Virtual Channels
  • Configurable Lane Width - x8, x4, x2, x1
  • Non-blocking Routing Architecture
  • Technology Independent Design for ASIC/FPGA

Brief Product Overview

ASIC Deliverables

  • Synthesizable RTL
  • Sample Synthesis and Static Timing Scripts
  • User Manual for Integration and Application Notes
  • Support from PCI Express Experts

FPGA Deliverables

  • Synthesizable RTL
  • User Constraint File
  • User Manual for Integration and Application Notes
  • Support from PCI Express Experts

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